Renesas Electronics /R7FA6M1AD /ADC120 /ADPGAGS0

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Interpret as ADPGAGS0

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0000)P000GAIN 0 (0000)P001GAIN 0 (others)P002GAIN 0Reserved

P001GAIN=0000, P002GAIN=others, P000GAIN=0000

Description

A/D Programmable Gain Amplifier Gain Setting Register 0

Fields

P000GAIN

PGA P000 gain setting bit. The gain magnification of (ADPGSDCR0.P000GEN=0b) when the shingle end is input and each PGA P000 is set. When the differential motion is input, (ADPGSDCR0.P000GEN=1b) sets the gain magnification when the differential motion is input by the combination with ADPGSDCR0.P000DG 1:0.

0 (others): Setting prohibited

0 (0000): x 2.000 (ADPGADDCR0.P000DEN=0)

1 (0001): x 2.500 (ADPGADDCR0.P000DEN=0) / x 1.500 (ADPGADDCR0.P000DEN=1)

2 (0010): x 2.667 (ADPGADDCR0.P000DEN=0)

3 (0011): x 2.857 (ADPGADDCR0.P000DEN=0)

4 (0100): x 3.077 (ADPGADDCR0.P000DEN=0)

5 (0101): x 3.333 (ADPGADDCR0.P000DEN=0) / x 2.333 (ADPGADDCR0.P000DEN=1)

6 (0110): x 3.636 (ADPGADDCR0.P000DEN=0)

7 (0111): x 4.000 (ADPGADDCR0.P000DEN=0)

8 (1000): x 4.444 (ADPGADDCR0.P000DEN=0)

9 (1001): x 5.000 (ADPGADDCR0.P000DEN=0) / x 4.00 (ADPGADDCR0.P000DEN=1)

10 (1010): x 5.714 (ADPGADDCR0.P000DEN=0)

11 (1011): x 6.667 (ADPGADDCR0.P000DEN=0) / x 5.667 (ADPGADDCR0.P000DEN=1)

12 (1100): x 8.000 (ADPGADDCR0.P000DEN=0)

13 (1101): x 10.000 (ADPGADDCR0.P000DEN=0)

14 (1110): x 13.333 (ADPGADDCR0.P000DEN=0)

P001GAIN

PGA P001 gain setting bit. The gain magnification of (ADPGSDCR0.P001GEN=0b) when the shingle end is input and each PGA P001 is set. When the differential motion is input, (ADPGSDCR0.P001GEN=1b) sets the gain magnification when the differential motion is input by the combination with ADPGSDCR0.P001DG 1:0.

0 (others): Setting prohibited

0 (0000): x 2.000 (ADPGADDCR0.P001DEN=0)

1 (0001): x 2.500 (ADPGADDCR0.P001DEN=0) / x 1.500 (ADPGADDCR0.P001DEN=1)

2 (0010): x 2.667 (ADPGADDCR0.P001DEN=0)

3 (0011): x 2.857 (ADPGADDCR0.P001DEN=0)

4 (0100): x 3.077 (ADPGADDCR0.P001DEN=0)

5 (0101): x 3.333 (ADPGADDCR0.P001DEN=0) / x 2.333 (ADPGADDCR0.P001DEN=1)

6 (0110): x 3.636 (ADPGADDCR0.P001DEN=0)

7 (0111): x 4.000 (ADPGADDCR0.P001DEN=0)

8 (1000): x 4.444 (ADPGADDCR0.P001DEN=0)

9 (1001): x 5.000 (ADPGADDCR0.P001DEN=0) / x 4.00 (ADPGADDCR0.P001DEN=1)

10 (1010): x 5.714 (ADPGADDCR0.P001DEN=0)

11 (1011): x 6.667 (ADPGADDCR0.P001DEN=0) / x 5.667 (ADPGADDCR0.P001DEN=1)

12 (1100): x 8.000 (ADPGADDCR0.P001DEN=0)

13 (1101): x 10.000 (ADPGADDCR0.P001DEN=0)

14 (1110): x 13.333 (ADPGADDCR0.P001DEN=0)

P002GAIN

PGA P002 gain setting bit. The gain magnification of (ADPGSDCR0.P002GEN=0b) when the shingle end is input and each PGA P002 is set. When the differential motion is input, (ADPGSDCR0.P002GEN=1b) sets the gain magnification when the differential motion is input by the combination with ADPGSDCR0.P002DG 1:0.

0 (0000): x 2.000 (ADPGADDCR0.P002DEN=0)

0 (others): Setting prohibited

1 (0001): x 2.500 (ADPGADDCR0.P002DEN=0) / x 1.500 (ADPGADDCR0.P002DEN=1)

2 (0010): x 2.667 (ADPGADDCR0.P002DEN=0)

3 (0011): x 2.857 (ADPGADDCR0.P002DEN=0)

4 (0100): x 3.077 (ADPGADDCR0.P002DEN=0)

5 (0101): x 3.333 (ADPGADDCR0.P002DEN=0) / x 2.333 (ADPGADDCR0.P002DEN=1)

6 (0110): x 3.636 (ADPGADDCR0.P002DEN=0)

7 (0111): x 4.000 (ADPGADDCR0.P002DEN=0)

8 (1000): x 4.444 (ADPGADDCR0.P002DEN=0)

9 (1001): x 5.000 (ADPGADDCR0.P002DEN=0) / x 4.00 (ADPGADDCR0.P002DEN=1)

10 (1010): x 5.714 (ADPGADDCR0.P002DEN=0)

11 (1011): x 6.667 (ADPGADDCR0.P002DEN=0) / x 5.667 (ADPGADDCR0.P002DEN=1)

12 (1100): x 8.000 (ADPGADDCR0.P002DEN=0)

13 (1101): x 10.000 (ADPGADDCR0.P002DEN=0)

14 (1110): x 13.333 (ADPGADDCR0.P002DEN=0)

Reserved

These bits are read as 0000. The write value should be 0000.

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